We have the pleasure to welcome Kevin Garello from Imec, Belgium. He will give us a seminar at CEA/IRIG, Bat 1005, room 445 entitled :
SOT-MRAM: from fundamentals to large scale technology integration
Microelectronics industry is facing major challenges related to the volatility of CMOS cache memory elements (usually SRAM and eDRAM). Due to decreasing devices size, leakage current in standby mode are now dominating the power dissipation of CMOS circuits. Furthermore, the increased density and reduction in die area lead to heat dissipation and reliability issues. [read more]
