Magnetic Random Access Memories (MRAM) is a non-volatile memory technology, where information is stored by the magnetization direction of magnetic electrodes, very similar to computer hard-disk drives. The goal for MRAM memory is to simultaneously achieve high-speed read/write times, high density and unlimited cycling compared to other existing and emerging technologies.
Our group is developing advanced MRAM cell concepts patented at Spintec. The concepts are based on the use of temperature to reduce power consumption and increase the stability of the stored information. These ideas go beyond the conventional MRAM approach. The naturally occurring temperature increase during the write step is not lost, but is instead used to achieve the seemingly opposing goal of lowering the power consumption and increasing the thermal stability in the operating temperature range. Our group fosters young and experienced researchers developing/applying their expertise in the field of MRAM.
Questions to be addressed
Our main research axis is to use the naturally occurring temperature increase during the write step, when a current flows through the magnetic tunnel junction. The heating is used to go above a temperature threshold, making it possible to write the storage layer magnetization. This principle has been applied to in-plane magnetization cells using a storage layer pinned by an anti-ferromagnet and recently to perpendicular anisotropy cells. Our group’s goal is to demonstrate the proof-of-concept and then improve MRAM cell properties.
Our work involves the development of magnetic material systems, nano-fabrication (20-200nm cells), characterization of devices (magnetic & electrical) and simulation of the device behavior. Our activity in these vast fields is as follows;: On materials research, we are developing magnetic tunnel junctions with in-plane and perpendicular magnetic anisotropy. New electrode stacks having the material properties required by each specific concept need to be integrated in magnetic tunnel junctions, while achieving high levels of TMR signal. For the characterization of each concept we determine the write window parameters in terms of magnetic field, power consumption and magnetization reversal dynamics. Macrospin and micromagnetic simulation provide a better physical understanding of the system properties and the possibilities for optimization.
ANR EXCALYB – Perpendicular Anisotropy Materials for High-Density Non-volatile Magnetic Memory Cells
Crocus R&D – Thermally assisted MRAM
- Soutenance de thèse – Antoine CHAVENT [January 15th, 2016]
Jeudi 21 Janvier 2016 à 14H00, Phelma MINATEC – Amphithéâtre M001 (3 Parvis Louis Néel – 38016 Grenoble) Monsieur Antoine CHAVENT du DSM/INAC/SPINTEC soutiendra une thèse intitulée « Réduction du champ d’écriture de mémoires magnétiques à écriture assistée thermiquement ...
- Improving writing properties of TAS-MRAM by changing the voltage pulse shape [January 11th, 2016]
During writing of Thermally Assisted Switching Magnetic Random Access Memory (TAS-MRAM), the torque due to a voltage pulse may be used to help writing. As part of collaboration between Spintec and Crocus Technology, we brought ...
- Une mémoire STT MRAM sub-nanoseconde made in Spintec [December 09th, 2015]
Spintec développe une mémoire STT-MRAM dix fois plus rapide que les produits annoncés pour 2016 chez Samsung ou Intel. Sa vitesse d’écriture est inférieure à la nanoseconde, contre 5 à 10 nanosecondes habituellement. La différence ...
- Améliorer le contrôle de l’écriture sub-nanoseconde de mémoires magnétiques en augmentant le rapport de forme des cellules mémoires [October 07th, 2015]
Les mémoires magnétiques à base de jonctions tunnel magnétiques appelées Spin-Transfer-Torque Random Access Memories (STT-MRAM) suscitent un intérêt considérable pour la micro-électronique grâce à leurs avantages combinés de non-volatilité, densité, vitesse, endurance. Dans ce travail, ...
- WP6 : BENCHMARKING AND ROADMAP FOR HYBRID NON-VOLATILE LOGIC CMOS/MTJ TECHNOLOGY [July 02nd, 2015]
The purpose of this WP is twofold. The first purpose is benchmark the performance of these CMOS/MTJ based circuits with those of CMOS-only circuits of similar functionalities. This work is still in progress but some initial ...