Spin–orbit-torque (SOT) MRAM writing exhibits an unusual current dependence: at high current amplitudes, the write probability can drop to zero or even oscillate as the current increases. In collaboration with Antaios, we showed that this behavior originates from an intrinsic, largely deterministic back-switching mechanism, and we demonstrated that tailoring the pulse fall time significantly widens the reliable write window.

Experimental WER versus SOT write current for 10-ns pulses. (a) 100-nm CoFeB(0.9 nm) pillars on β-W Hall crosses, measured at HX=950Oe for pulse fall times of 2, 3, and 4 ns. (b) 75-nm MTJ dot on a 130-nm-wide β-W(4 nm) SOT track, measured at Hx=800Oe with a 2-ns fall time.

SOT-MRAM is particularly attractive for replacing the memories closest to processing units, as it combines high endurance with sub-nanosecond switching times. Reliable writing is therefore essential for this technology to scale and mature. However, perpendicularly magnetized SOT-MRAM devices may enter a back-switching regime in which increasing the current causes the bit to relax back to its initial state. We studied ~60-nm CoFeB pillars on β-W Hall crosses and mapped the write-error rate (WER) as a function of nanosecond SOT-pulse amplitude under magnetic fields applied along x, y, and z. These WER maps consistently reveal three regions: no switching, deterministic forward switching (low WER), and a high-WER zone where the magnetization returns to the starting state. This provides clear evidence that back-switching is a systematic dynamical outcome rather than random noise. Importantly, the effect is observed with practical nanosecond-scales write pulses and is reproduced across device configurations, from 100-nm pillars on β-W Hall crosses to a full SOT-MRAM single cell (MTJ dot on a W SOT track), highlighting its relevance for circuit-level operation.

Realistic macrospin simulations reproduce the maps and clarify the mechanism: at large currents, spin-orbit torques drive the magnetization close to an energetically unstable in-plane equilibrium; after the pulse, small thermal fluctuations during relaxation can send it back to the original state, depending on the torque balance. Guided by this picture, we mitigate back-switching without changing materials by shaping the write pulse. Lengthening the fall time keeps the torques active during relaxation and steers the magnetization away from the unstable point. Experimentally, increasing the fall time (2→4 ns) suppresses back-switching and widens the forward-switching window; on a complete SOT-MRAM single cell, this approach achieved WER < 2×10⁻⁶ (no errors in 5×10⁵ writes), improving write margins. Beyond performance gains, these macrospin simulations also pave the way for compact device models that explicitly capture back-switching, enabling more predictive design of write drivers and error budgets.

Team: Spinorbitronics

Collaborations: Antaios

Funding: EU Horizon 2020 MSCA ITN SPEAR (Grant 955671), Région Auvergne-Rhône-Alpes Pack Ambition Recherche (19-009938-01-MAPS), and RENATECH/PTA support (ANR-22-PEEL-0015)

Further reading: Intrinsic back-switching phenomenon in spin-orbit torque MRAM devices, K. Ray, J. Vigier, P. Usé , S. Martin, N. Lefoulon, C. Bouard, M. Drouard, G. Gaudin, Phys. Rev. Appl. 24, 064038 (2025).
Open access: hal-05411536

Contact: Gilles Gaudin