The transversal team aims at bringing together all competencies from SPINTEC involving spintronic devices nanofabrication, characterization, circuit integration, architecture, and algorithm techniques to implement hardware solutions for artificial intelligence (AI) and unconventional computing.
Spintronic-based multifunctional devices are a substantial opportunity to improve the energy efficiency of next-generation computing hardware. Moreover, this approach allows taking advantage of brain-inspired computing models to deploy cutting-edge neuromorphic algorithms, crossing the gap between current hardware AI implementations and exceptional brain computing ability.
As the brain performs very sophisticated operations and consumes only a few Watts, brain-inspired/neuromorphic computing is a promising path for which spintronic devices can efficiently emulate both neurons and synapses in hardware. Their nanometric size, sensitivity to input stimuli, and interactions make those devices ideal for implementing large arrays of neuro-synaptic elements: spintronic nano-oscillators, spintronic and ferroelectric memristors, magnetic memories, superparamagnetic tunnel junctions, skyrmions, etc.
Noise is a crucial ingredient in emulating the stochastic nature of the neural activity and executing energy-efficient computing algorithms such as energy-based or temporal-based machine learning models. In this context, probabilistic computing is a very suitable approach that relaxes usual precision computing constraints. The truly random nature of spintronic devices (such as superparamagnetic tunnel junctions) makes them attractive for hardware implementations of probabilistic computing approaches.
In memory computing
The most promising solutions for non-Von Neumann, in-memory computing architectures are based on the use of emerging technologies, that are able to act as both storage and information processing units thanks to their specific physical properties. High accuracy, Deep neural networks (DNN) can be built with crossbars analog in memory computing concept, involving MRAM families, such as STT, SOT, VCMA, but also with more exotic families of magneto-resistive, and ferroelectric or skyrmion based devices.
- CEA LIST
- CEA LETI
- Masters thesis projects for Spring 2023 (September 21st, 2022)
You find here the list of proposals for Master-2 internships to take place at Spintec during Spring 2023. In most cases, these internships are intended to be suitable for a longer-term PhD work. Interested Master-1 ...
- Post-doctoral position (August 04th, 2022)
Context: In the frame of different European and French national projects, SPINTEC has several openings for postdoctoral positions. The projects consider memory, microwave and sensor functionalities to develop novel hardware concepts for unconventional computing, to ...
- PEPR SPIN – Priority Programs and Equipment for Exploratory Research (July 29th, 2022)
France is investing more than 38M€ in Spintronics thanks to the PEPR-SPIN exploratory program! SPIN is among the 13 new exploratory programs winners of the second wave of calls for projects Priority Programs and ...
- Seminar – Magnetic Josephson Junctions for artificial synapses (December 09th, 2021)
On Wednesday, May 11th at 10:30 Emilie Jué from Univ. of Colorado Boulder and NIST will give us a seminar entitled: Magnetic Josephson Junctions for artificial synapses Place : CEA Bat. 10.05 Room 445 (limited to persons ...
- STOCHNET – An ANR project (December 09th, 2021)
STOCHNET stands for Hybrid Stochastic Tunnel Junction Circuits for Optimization and Inference. The motivation behind StochNet is to explore — through experimental demonstrations with hybrid CMOS stochastic tunnel junction circuits and simulations of theoretical ...