ERC Proof of Concept grant MAGALIGN is awarded in the framework of ERC Project MAGICAL
The launching of a new generation of spintronic memory (STT-MRAM) in volume production in 2019 by all major microelectronics companies marks the adoption of spintronics by microelectronics industry. This constitutes a major milestone in the field. SPINTEC largely contributed to these developments and hold key patents on MRAM technology. Part of these developments were performed thanks to two ERC Adv. grants that dealt with various MRAM optimizations and their potential for low power and multifunctional spintronic circuits. In the frame of the second ERC project MAGICAL (”CMOS/Magnetoelectronic Integrated Circuits with Multifunctional Capabilities”), an ERC-Proof of Concept grant MAGALIGN (“Magnetic alignment for high precision 3D assembly”) just got funded. The main goal of this project is summarized below.
In microelectronics, 3D integration and assembly definitely appears as a very efficient option to achieve highly integrated chips. It offers major benefits such as combining heterogeneous technologies, combining high-performance and low-power chips, increasing data transfer bandwidth in memory above logic circuits, etc. 3D assembly is realized by bonding two wafers or chips face to face on a wafer. In this bonding process, the number of interchips interconnects is limited by the accuracy of the alignment process. Presently, alignment methods rely on optical alignment techniques which offer ±0.2 μm resolution for wafer-to-wafer bonding or only ±1 μm resolution for die-to-wafer bonding. This is relatively poor and limits the density of interconnects and therefore the bandwidth of interchip communication. In this ERC PoC project, it is intended to establish the viability of a novel magnetic alignment approach based on nanomagnetism and spin electronics which could yield unprecedented accuracy in alignment during wafer bonding.
The goals of MAGALIGN are i) to make a proof of concept of this novel alignment method, ii) optimize it and develop the design tools to exploit it, iii) develop industrialization strategy.