SPINTRONIC IC DESIGN



Research team Spintronic IC design, within the device group


NV-APROC – An ANR project

NV-APROC stands for Non Volatile MRAM-based Asynchronous PROCessor, a 42-month ANR project starting on October 2019, coordinated by Spintec. Micro and nano electronics integrated circuit domain has been strongly driven by the advent of the Internet of Things (IoT). The constraints become very strong, especially in terms of power consumption and autonomy. Therefore there is […]

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MISTRAL – An ANR project

MISTRAL stands for MRAM/CMOS Hybridization to Secure Cryptographic Algorithms, an 42-month ANR project starting on October 2019, coordinated by EMSE (Ecole des Mines de St Etienne in Gardanne). MISTRAL is addressing the security of the cryptography embedded in connected objects at its highest standards while keeping concern by the energy footprint. Consequently, MISTRAL aims at […]

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Rana Alhalabi has been awarded of the best poster prize at the 18th Non-Volatile Memory Technology Symposium that took place in October 2018 in Sendai, Japan. The title of the poster was “High density SOT-MRAM memory array based on a single transistor”. Based on a 32kb memory, this work has shown that replacing one of […]

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A full hybrid magnetic/CMOS System on Chip (SoC), embedding analog and digital functions based on spintronics devices on the same die, has been designed and sent to manufacturing. It is the first demonstrator of such a circuit worldwide. Spintronics, which aims at using magnetic devices beside standard CMOS transistors, has been intensively studied for several […]

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You find here the list of proposals for Master-2 internships to take place during Spring 2019. In most cases, these internships are intended to be suitable for a longer-term PhD work. Interested Master-1 students are also encouraged to apply. You may either download the full list of proposals, along with an introduction to the SPINTEC […]

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On October 23 at 11am at SPINTEC room 434A, Guillaume Salagnac (left) and Tanguy Risset (right) from INRIA Lyon will kindly present the work of their team during a seminar entitled: “NV-RAM and harvesting technologies for next generation sensors: a system and software perspective” The Socrate Inria Team (https://team.inria.fr/socrate/) has launched a new research activity […]

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Continual growth in the size and functionality of FPGA over few years leads to an increasing interest in their use for high speed applications. However, the memory access speed limits the execution speed. The great amount of data affects the whole function. This work introduces a novel high speed and high-area efficiency MRAM based non-volatile […]

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Best poster award of EEATS

In the framework of an internal collaborative project between CEA-LETI and CEA/CNRS/UGA-SPINTEC Lab, Rana Alhalabi proposed a new Look Up Table (LUT) architecture, which is one of the elementary cell of FPGAs (Field Programmable Grid Array). This innovation offers a 55% sense delay reduction, 47% number of MTJ reduction, 46% power-delay product reduction and a […]

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Radiation robust circuit design for harsh environments like space is a big challenge for IC design and embedded systems. As circuits become more and more complex and CMOS processes get denser and smaller, their immunity towards particle strikes decreases drastically. Spintec proposed a novel integrated circuit structure that enable to increase to increase the robustness […]

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You find here the list of proposals for Master-2 internships to take place during Spring 2018. In most cases, these internships are intended to be suitable for a longer-term PhD work. Interested Master-1 students are also encouraged to apply. You may either download the full list of proposals, along with an introduction to the SPINTEC […]

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