The Magnetic Random Access Memories (MRAM) group develops advanced concepts in this emerging technology. The goal is to realize cells with improved thermal stability, lower power consumption and/or faster switching. Our research covers material stack deposition, nano-fabrication and electrical test evaluation, for applications as standalone memory and non-volatile logic.

Research directions

Perpendicular Anisotropy Materials


High energy barriers for spin transfer torque (STT) MRAM cells can be achieved with perpendicular anisotropy magnetic tunnel junctions. Solutions for high density MRAM cells to diameters below 20nm require continuous improvements in perpendicular surface anisotropy, while maintaining high TMR properties.

Perpendicular STT MRAM


Evaluation of MRAM concepts requires simulation of expected reversal mechanisms and electrical characterization of individual cells. We aim at understanding dynamics of magnetization reversal and the expected impact of stack modifications to explore application specific optimizations.

CMOS Integration for Non-Volatile Logic


The challenge to validate hybrid CMOS designs to create non-volatile logic circuits requires the backend integration of MRAM cells with custom CMOS circuits. Our goal is to provide an integration platform for proof-of-concept prototype runs.

Thermally Assisted Switching


Perpendicular anisotropy magnetic tunnel junctions provide a solution to for high density MRAM cells where the cell diameter can be scaled to 20nm and possibly below. Thermal assisted STT writing in perpendicular cells allows large values of thermal stability, while maintaining a low critical current via the thermal re-orientation of perpendicular anisotropy storage layers.

The team

Permanent staff

Ricardo SOUSA

Bernard DIENY

Jean-Pierre NOZIERES



  • Nikita STRELKOV (2016-2019)


Process Engineers

Former members

  • Andrey TIMOPHEEV (2014-2017)
  • Van Dai NGUYEN (2016-2018)


  • Hieu Tan NGUYEN (2013-2016)
  • Jyotirmoy CHATTERGEE (2014-2017)
  • Luc TILLIE (2015-2018)
  • Nicolas PERRISSIN (2015-2018)

Process Engineers

  • Jude GUELFFUCCI (2015-2017)
  • Nathalie LAMARD (2016-2017)
  • Guillaume LAVAITTE (2015-2016)


  • Samsung SGMI (2014-2017)
  • ANR Excalyb (2014-2017)
  • Heumem (2015-2018)
  • EU-FET Spice (2016-2019)
  • EU Great (2016-2019)
  • ERC Magical (2015-2020)


  • CEA LETI, Grenoble, France
  • Institut NEEL, Grenoble, France
  • Crocus Technology, Grenoble, France
  • Samsung, San Jose, USA
  • Singulus AG, Kahl am Main, Germany
  • Aarhus University, Aarhus, Denmark

Recent news

  • SPINTEC’s spinoff HProbe offers 3D magnetic probers (November 03rd, 2016)
    HProbe is the latest spin-off company from SPINTEC, based on our expertise in MRAM research at the wafer scale. HProbe offers a 3D magnetic field wafer-level electrical tester for all types of MRAM (STT, SOT, ...
  • Misalign to write faster (October 17th, 2016)
    The writing in conventional magnetic memories based on magnetic tunnel junctions (STT-MRAM) is intrinsically stochastic : a large amplitude thermal fluctuation is required to trigger the siwthing of the storage layer magnetization. SPINTEC has shown ...
  • Editor – Proceedings of the IEEE, Special issue on Spintronics (October 01st, 2016)
    Special issue on Spintronics, published in the proceedings of the IEEE, vol.104 (10), October 2016 Editors: Hideo Ohno, Mark Stiles, Bernard Dieny
  • GREAT – A H2020 ICT project at SPINTEC (June 30th, 2016)
    Overview GREAT (European H2020 project) was accepted at the Summer 2015. Its kick-off meeting took place at SPINTEC in Grenoble on February 22nd-23rd 2016. The project aims at developing magnetic stacks able to equally perform memory, radio-frequency ...
  • SPICE – An H2020 FET project at SPINTEC (May 19th, 2016)
    A new research project has been accepted at the last FET H2020 call. The objective of SPICE is to realize a novel integration platform that combines photonic, magnetic and electronic components. Its validity will be shown ...

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