The team is dedicated to the evaluation of the benefits of using magnetic devices in Integrated Circuits (ICs). It is expected that integrating non-volatility in ICs could contribute to push forward the incoming limits in the microelectronics scaling. This work includes integrating the magnetic devices in standard design tools, design hybrid circuits and evaluate their performance for various applications.
Hybrid CMOS/Magnetic design flow
Designing hybrid circuits requires integrating the magnetic devices in the standard design flow of microelectronics. This includes compacts models for electrical simulations, technology files including the magnetic back-end and libraries of Standard Cells for digital design.
Low-power logic circuits
One issue related to microelectronics scaling is the increasing standby power, due to leakage currents. Introducing non-volatility in circuits allows easing the power gating technique, which consists in cutting-off the power supply of inactive blocks to save leakage.
While STT MRAM can be beneficial for hardware security (taking advantage of its stochastic behavior for cryptography for instance), it also presents some specific failures mechanisms that has to be studied to take the appropriate countermeasures.
Radiation hardening for space applications
The intrinsic hardness to radiations of the magnetic devices make them a good candidate to be embedded in circuits for space applications. It can be advantageously combined with other hardening technologies or design techniques.
- Kotb JABEUR
- Pierre VANHAUWAERT
- Mounia KHARBOUCHE
- Rana ALHALABI
- Jeremy LOPES
- GREAT, H2020 (2016-2019)
- ANR MASTA (2016-2019)
- Toplink Innovation
- University of Brasov
- A Novel Asynchronous Radiation-Hard Error Correction Structure Based on MRAM (October 19th, 2017)
Radiation robust circuit design for harsh environments like space is a big challenge for IC design and embedded systems. As circuits become more and more complex and CMOS processes get denser and smaller, their immunity ...
- Proposals for student internships for Spring 2018 (October 03rd, 2017)
You find here the list of proposals for Master-2 internships to take place during Spring 2018. In most cases, these internships are intended to be suitable for a longer-term PhD work. Interested Master-1 students are ...
- PhD thesis defense : Design of an Innovative Asynchronous, Non-Volatile Integrated Circuit for Space Applications (August 31st, 2017)
On Monday, the 18th Of September 2017 at 14h00, Jérémy LOPES from DRF/INAC/SPINTEC, will defend his PhD thesis entitled “Design of an Innovative Asynchronous, Non-Volatile Integrated Circuit for Space Applications” Place : LIRMM, 161 rue Ada ...
- Seminar : Neuromorphic computing : From a memristive device to the learning process (July 05th, 2017)
on July, 12th, 14H, Steven Lequeux from Spintec, will give a seminar on “Neuromorphic computing : From a memristive device to the learning process”. The seminar will take place in Building 10.05, room 434. In ...
- Research engineer tenure track open position (filled) (July 28th, 2016)
SPINTEC has developed over the last decade many tools for integrating spintronic devices into standard CMOS microelectronics : design tools have been developed and elementary proofs of concept circuits have been built and tested. The integration ...