MRAM



Research team MRAM memories, within the Devices group


You find here the list of proposals for Master-2 internships to take place at Spintec during Spring 2020. In most cases, these internships are intended to be suitable for a longer-term PhD work. Interested Master-1 students are also encouraged to apply. You may download the full list of proposals, along with an introduction to the […]

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A GMR Heads oral history panel was held at the Computer History Museum, Mountain view, California, in May 2019. It celebrated the introduction of giant magnetoresistance (GMR) heads in hard disk drives in 1997, which has been a key is sustaining the growth rate of areal density in magnetic recording. The panel featured four colleagues […]

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On Wednesday September 25 at 11:00 we have the pleasure to welcome Prof. Jian-Ping WANG (University of Minnesota, MN, USA). He will give us a seminar at CEA/IRIG, Bat 1005, room 445 entitled : Computing using magnetic random access memory (CRAM) and spin-orbit torque (SOT) memory cell To enable local or edge AI like family-based […]

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Increasing the thermal budget beyond 400°C of magnetic random access memory (MRAM) cells is a major goal to allow for seamless conventional electronics integration. At these temperatures significant material diffusion can destroy the interface properties of new generation perpendicular magnetization stacks targeting technology nodes below 20nm. This study highlights the origin in the improvement obtained […]

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Wednesday August 07 at 11:00 we have the pleasure to welcome Cécile Grezes, Electrical Engineering department, UCLA, Los Angeles. She will give us a seminar at CEA/SPINTEC, Bat 1005, room 434 entitled : Magnetic tunnel junctions using voltage control of the magnetic anisotropy for electric-field-controlled MRAM Building on the advances of magnetoresistive random access memory […]

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Electronics of the future

The journal of the French Society for electricity, electronics and information technologies (Société de l’électricité, de l’électronique et des technologies de l’information et de la communication) dedicated a special issue to Electronics of the future (in French). Lucian Prejbeanu and Bernard Diény, from SPINTEC, authored an article on new concepts of ultrafast and highly scalable […]

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On Monday July 1 at 14:00 we have the pleasure to welcome Kevin Garello from Imec, Belgium. He will give us a seminar at CEA/IRIG, Bat 1005, room 445 entitled : SOT-MRAM: from fundamentals to large scale technology integration Microelectronics industry is facing major challenges related to the volatility of CMOS cache memory elements (usually […]

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Topic Classical microelectronics is reaching its limits of downward scalability, reaching technological or scientific bottlenecks. Magnetic random access memories, based on magnetic tunnel junctions storing and reading bits of information, are emerging key ICT components. They are of immediate relevance for low-power and high-speed processor and mass-storage cache memory. Similar to other technologies, ways are […]

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Measured switching diagrams of perpendicular magnetic tunnel junctions exhibit unexpected behavior at high voltages associated with significant heating of the storage layer. The boundaries deviate from the critical lines corresponding to the coercive field, which contrasts with the theoretically predicted behavior of a standard macrospin-based model. In this paper, we are proposing a modified model […]

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On January 29, we have the pleasure to welcome Stephane Mangin from Institut Jean Lamour, Univ. de Lorraine, Nancy, France. He will give us a seminar at 11:00, CEA/Spintec, Bat. 1005, room 434A entitled : All-optical magnetization switching in spin-valve structure mediated by spin-polarized hot electron transport S. Iihama1,2, Y. Xu1, M. Deb1, G. Malinowski1, […]

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